/**
 * \file
 * Startup code and vector tables.
 */

/*
 *
 * Copyright (c) 2010, Jesper Hansen
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without modification,
 * are permitted provided that the following conditions are met:
 *
 *      * Redistributions of source code must retain the above copyright notice, this
 *       list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright notice,
 *       this list of conditions and the following disclaimer in the documentation
 *       and/or other materials provided with the distribution.
 *     * Neither the name of the copyright holders nor the names of any contributors
 *       may be used to endorse or promote products derived from this software
 *       without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *
 */

//
// Just to make the following declarations a little simpler
//
#define WEAK __attribute__ ((weak))

//
// Forward declaration of all fault and external interrupt handlers
//
void WEAK Nmi_IntHandler(void);

//void WEAK HardFault_IntHandler(void);
//void WEAK MpuFault_IntHandler(void);
//void WEAK BusFault_IntHandler(void);
//void WEAK UsageFault_IntHandler(void);
void WEAK Fault_IntHandler(void);		// common for the four functions above


void WEAK Svc_IntHandler(void);
void WEAK Debug_IntHandler	(void);
void WEAK PendSV_IntHandler(void);
void WEAK SysTick_IntHandler(void);

void WEAK GPIOA_IntHandler(void);
void WEAK GPIOB_IntHandler(void);
void WEAK GPIOC_IntHandler(void);
void WEAK GPIOD_IntHandler(void);
void WEAK GPIOE_IntHandler(void);
void WEAK UART0_IntHandler(void);
void WEAK UART1_intHandler(void);
void WEAK SSI0_IntHandler(void);
void WEAK I2C0_IntHandler(void);
void WEAK PwmFault_IntHandler(void);
void WEAK PWM0_IntHandler(void);
void WEAK PWM1_IntHandler(void);
void WEAK PWM2_IntHandler(void);
void WEAK QE0_IntHandler(void);
void WEAK ADC0_IntHandler(void);
void WEAK ADC1_IntHandler(void);
void WEAK ADC2_IntHandler(void);
void WEAK ADC3_IntHandler(void);
void WEAK WDG_IntHandler(void);
void WEAK TIM0A_IntHandler(void);
void WEAK TIM0B_IntHandler(void);
void WEAK TIM1A_IntHandler(void);
void WEAK TIM1B_IntHandler(void);
void WEAK TIM2A_IntHandler(void);
void WEAK TIM2B_IntHandler(void);
void WEAK ACO0_IntHandler(void);
void WEAK ACO1_IntHandler(void);
void WEAK ACO2_IntHandler(void);
void WEAK SYSCON_IntHandler(void);
void WEAK FLASH_IntHandler(void);
void WEAK GPIOF_IntHandler(void);
void WEAK GPIOG_IntHandler(void);
void WEAK GPIOH_InttHandler(void);
void WEAK UART2_IntHandler(void);
void WEAK SSI1_IntHandler(void);
void WEAK TIM3A_IntHandler(void);
void WEAK TIM3B_IntHandler(void);
void WEAK I2C1_IntHandler(void);
void WEAK QE1_IntHandler(void);
void WEAK CAN0_IntHandler(void);
void WEAK CAN1_IntHandler(void);
void WEAK CAN2_IntHandler(void);
void WEAK ETH_IntHandler(void);
void WEAK HIBER_IntHandler(void);


//
// The entry point for the application.
//
extern int main(void);


//*****************************************************************************
//! \name Linker Segments
//!
//! The following are constructs created by the linker, indicating where the
//! the "data" and "bss" segments reside in memory. The initializers for the
//! "data" segment resides immediately following the "text" segment.
//!
//*****************************************************************************
//@{
extern unsigned long _etext;
extern unsigned long _data;
extern unsigned long _edata;
extern unsigned long _bss;
extern unsigned long _ebss;
//@}


//*****************************************************************************
//!
//! This is the code that gets called when the processor first starts execution
//! following a reset event.  Only the absolutely necessary set is performed,
//! after which the application supplied entry() routine is called.  Any fancy
//! actions (such as making decisions based on the reset cause register, and
//! resetting the bits in that register) are left solely in the hands of the
//! application.
//!
//*****************************************************************************
void ResetISR(void)
{
    unsigned long *pulSrc, *pulDest;

    //
    // Copy the data segment initializers from flash to SRAM.
    //
    pulSrc = &_etext;
    for(pulDest = &_data; pulDest < &_edata; )
    {
        *pulDest++ = *pulSrc++;
    }

    //
    // Zero-fill the BSS segment
    //
    for(pulDest = &_bss; pulDest < &_ebss; )
    	*pulDest++ = 0;

    //
    // Call the application's entry point.
    //
    main();
}


//*****************************************************************************
//!
//! This is the location to which the main stack pointer will initially be set.
//! Should be defined in the linker file to point to the end of internal SRAM.
//!
//*****************************************************************************
extern unsigned long _estack;


//*****************************************************************************
//!
//! The vector table.  \note Note that the proper constructs must be placed on this to
//! ensure that it ends up at physical address 0x0000.0000.
//!
//*****************************************************************************
__attribute__ ((section(".isr_vector"))) void (* const g_pfnVectors[])(void) =
{
	(void (*)(void))((unsigned long)&_estack),	// The initial stack pointer
    ResetISR,				// The reset handler
    Nmi_IntHandler,			// The NMI handler
    Fault_IntHandler,		// The hard fault handler
    Fault_IntHandler,		// The MPU fault handler
    Fault_IntHandler,		// The bus fault handler
    Fault_IntHandler,		// The usage fault handler
    0,						// Reserved
    0,						// Reserved
    0,						// Reserved
    0,						// Reserved
    Svc_IntHandler,			// SVCall handler
    Debug_IntHandler,		// Debug monitor handler
    0,						// Reserved
    PendSV_IntHandler,		// The PendSV handler
    SysTick_IntHandler,		// The SysTick handler

    GPIOA_IntHandler,		// GPIO Port A
    GPIOB_IntHandler,		// GPIO Port B
    GPIOC_IntHandler,		// GPIO Port C
    GPIOD_IntHandler,		// GPIO Port D
    GPIOE_IntHandler,		// GPIO Port E
    UART0_IntHandler,		// UART0 Rx and Tx
    UART1_intHandler,		// UART1 Rx and Tx
    SSI0_IntHandler,		// SSI0 Rx and Tx
    I2C0_IntHandler,		// I2C0 Master and Slave
    PwmFault_IntHandler,	// PWM Fault
    PWM0_IntHandler,		// PWM Generator 0
    PWM1_IntHandler,		// PWM Generator 1
    PWM2_IntHandler,		// PWM Generator 2
    QE0_IntHandler,			// Quadrature Encoder 0
    ADC0_IntHandler,		// ADC Sequence 0
    ADC1_IntHandler,		// ADC Sequence 1
    ADC2_IntHandler,		// ADC Sequence 2
    ADC3_IntHandler,		// ADC Sequence 3
    WDG_IntHandler,			// Watchdog timer
    TIM0A_IntHandler,		// Timer 0 subtimer A
    TIM0B_IntHandler,		// Timer 0 subtimer B
    TIM1A_IntHandler,		// Timer 1 subtimer A
    TIM1B_IntHandler,		// Timer 1 subtimer B
    TIM2A_IntHandler,		// Timer 2 subtimer A
    TIM2B_IntHandler,		// Timer 2 subtimer B
    ACO0_IntHandler,		// Analog Comparator 0
    ACO1_IntHandler,		// Analog Comparator 1
    ACO2_IntHandler,		// Analog Comparator 2
    SYSCON_IntHandler,		// System Control (PLL, OSC, BO)
    FLASH_IntHandler,		// FLASH Control
    GPIOF_IntHandler,		// GPIO Port F
    GPIOG_IntHandler,		// GPIO Port G
    GPIOH_InttHandler,		// GPIO Port H
    UART2_IntHandler,		// UART2 Rx and Tx
    SSI1_IntHandler,		// SSI1 Rx and Tx
    TIM3A_IntHandler,		// Timer 3 subtimer A
    TIM3B_IntHandler,		// Timer 3 subtimer B
    I2C1_IntHandler,		// I2C1 Master and Slave
    QE1_IntHandler,			// Quadrature Encoder 1
    CAN0_IntHandler,		// CAN0
    CAN1_IntHandler,		// CAN1
    CAN2_IntHandler,		// CAN2
    ETH_IntHandler, 		// Ethernet
    HIBER_IntHandler		// Hibernate
};


//*****************************************************************************
//!
//! This is the code that gets called when the processor receives an unexpected
//! interrupt.  This simply enters an infinite loop, preserving the system state
//! for examination by a debugger.
//!
//*****************************************************************************
static void Default_IntHandler(void)
{
    //
    // Go into an infinite loop.
    //
    while(1)
    {
    }
}

//
// Weak aliases for all handlers.
// These are initially set to point to the Default_IntHandler
// As they are weak aliases, they will be overridden by ny function
// with the same name.
//
#pragma weak Nmi_IntHandler 		= Default_IntHandler

//#pragma weak HardFault_IntHandler	= Default_IntHandler
//#pragma weak MpuFault_IntHandler 	= Default_IntHandler
//#pragma weak BusFault_IntHandler 	= Default_IntHandler
//#pragma weak UsageFault_IntHandler	= Default_IntHandler
#pragma weak Fault_Handler 			= Default_IntHandler


#pragma weak Svc_IntHandler 		= Default_IntHandler
#pragma weak Debug_IntHandler 		= Default_IntHandler
#pragma weak PendSV_IntHandler 		= Default_IntHandler
#pragma weak SysTick_IntHandler 	= Default_IntHandler

#pragma weak GPIOA_IntHandler 	= Default_IntHandler
#pragma weak GPIOB_IntHandler 	= Default_IntHandler
#pragma weak GPIOC_IntHandler 	= Default_IntHandler
#pragma weak GPIOD_IntHandler 	= Default_IntHandler
#pragma weak GPIOE_IntHandler	= Default_IntHandler
#pragma weak UART0_IntHandler 	= Default_IntHandler
#pragma weak UART1_intHandler 	= Default_IntHandler
#pragma weak SSI0_IntHandler 	= Default_IntHandler
#pragma weak I2C0_IntHandler 	= Default_IntHandler
#pragma weak PwmFault_IntHandler= Default_IntHandler
#pragma weak PWM0_IntHandler 	= Default_IntHandler
#pragma weak PWM1_IntHandler 	= Default_IntHandler
#pragma weak PWM2_IntHandler 	= Default_IntHandler
#pragma weak QE0_IntHandler 	= Default_IntHandler
#pragma weak ADC0_IntHandler 	= Default_IntHandler
#pragma weak ADC1_IntHandler 	= Default_IntHandler
#pragma weak ADC2_IntHandler 	= Default_IntHandler
#pragma weak ADC3_IntHandler 	= Default_IntHandler
#pragma weak WDG_IntHandler 	= Default_IntHandler
#pragma weak TIM0A_IntHandler 	= Default_IntHandler
#pragma weak TIM0B_IntHandler 	= Default_IntHandler
#pragma weak TIM1A_IntHandler 	= Default_IntHandler
#pragma weak TIM1B_IntHandler 	= Default_IntHandler
#pragma weak TIM2A_IntHandler 	= Default_IntHandler
#pragma weak TIM2B_IntHandler 	= Default_IntHandler
#pragma weak ACO0_IntHandler 	= Default_IntHandler
#pragma weak ACO1_IntHandler 	= Default_IntHandler
#pragma weak ACO2_IntHandler 	= Default_IntHandler
#pragma weak SYSCON_IntHandler 	= Default_IntHandler
#pragma weak FLASH_IntHandler 	= Default_IntHandler
#pragma weak GPIOF_IntHandler 	= Default_IntHandler
#pragma weak GPIOG_IntHandler 	= Default_IntHandler
#pragma weak GPIOH_InttHandler 	= Default_IntHandler
#pragma weak UART2_IntHandler 	= Default_IntHandler
#pragma weak SSI1_IntHandler 	= Default_IntHandler
#pragma weak TIM3A_IntHandler 	= Default_IntHandler
#pragma weak TIM3B_IntHandler 	= Default_IntHandler
#pragma weak I2C1_IntHandler 	= Default_IntHandler
#pragma weak QE1_IntHandler 	= Default_IntHandler
#pragma weak CAN0_IntHandler 	= Default_IntHandler
#pragma weak CAN1_IntHandler 	= Default_IntHandler
#pragma weak CAN2_IntHandler 	= Default_IntHandler
#pragma weak ETH_IntHandler 	= Default_IntHandler
#pragma weak HIBER_IntHandler 	= Default_IntHandler

//
// end
//

